Tuesday, December 01, 2015
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
WD, Samsung Lead The HDD And SSD Markets
4K Copy Protection Probably Cracked
AMD To Correct GPU Fan Control Issues With New Crimson Drivers
Google Outlines The Gifts We're Searching For This Holiday
Microsoft Launches New Office 365 Enterprise Capabilities, Dynamics CRM 2016 and Introduces PowerApps
BlackBerry is Exiting Asian Country Following Government Pressure
TDK To Buy Semiconductor Factory From Renesas Electronics
Swatch Parners With Visa On Pay-by-the wrist Payments
Active Discussions
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
How to burn a backup copy of The Frozen Throne
Help make DVDInfoPro better with dvdinfomantis!!!
Copied dvd's say blank in computer only
menu making
Optiarc AD-7260S review
 Home > News > Mobiles > Toshiba...
Last 7 Days News : SU MO TU WE TH FR SA All News

Friday, February 22, 2013
Toshiba Develops Low Power Technology for Embedded SRAM

Toshiba has developed an innovative low-power technology for embedded SRAM for application in smart phones and other mobile products.

The new technology reduces active and standby power in temperatures ranging from room temperature (RT) to high temperature (HT) by using a bit line power calculator (BLPC) and a digitally controllable retention circuit (DCRC). A prototype has been confirmed to reduce active and standby power consumption at 25C by 27% and 85%, respectively.

Typically, longer battery life requires lower power consumption in both high performance and low performance modes (MP3 decoding, background processing, etc.). As low performance applications require only tens of MHz operation, SRAM temperature remains around RT, where active and leakage power consumptions are comparable. Given this, the key issue is to reduce active and standby power from HT to RT.

Toshiba's new technology applies a BLPC and DCRC. The BLPC predicts power consumption of bit lines by using replicated bit lines to monitor the frequency of the ring oscillator. It minimizes the active power of the SRAM in certain conditions by monitoring the current consumption of the SRAM rest circuits. The DCRC decreases standby power in the retention circuit by periodically activating itself to update the size of the buffer of the retention driver.

Toshiba presented this development at the 2013 IEEE International Solid-State Circuit Conference in San Francisco, CA on February 20.

PayPal Brings Mobile Payments To Europe        All News        OCZ Bundles Far Cry 3 PC Game With Its Vector SSD Series
Mobile World Congress Kicks Off On Monday     Mobiles News      Next LG Optimus G II To Use ARM-based Chips Developed In-house

Get RSS feed Easy Print E-Mail this Message

Related News
Toshiba Takes Former Executives To Court
Toshiba To Sell Image Sensor Business to Sony
Toshiba and SanDisk Start Equipment Installation at Yokkaichi’s New Fab 2
Toshiba Unveils New Enterprise Performance HDD
Toshiba Introduces Windows 10 dynaPad Tablet, dynabook Notebooks
Toshiba's Image Sensor for Iris Recognition Improves Recognition And Security
Toshiba's Satellite Click 10 Detachable 2-in-1 PC Now Available
Toshiba Reports Q1 Loss on Weak PC, TV Sales
Toshiba Reports Significant Loss Following Accounting Scandal
Toshiba's New PCs Combine Functionality, Mobility and Performance
Toshiba At IFA 2015
Toshiba Launches Wireless Power Receiver IC for Quick Charging Mobile Devices

Most Popular News
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2015 - All rights reserved -
Privacy policy - Contact Us .