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Silicon Image Releases Scalable 4K-3D And Multi-Channel Video Decoder IP Core

Silicon Image Releases Scalable 4K-3D And Multi-Channel Video Decoder IP Core

Enterprise & IT Oct 21,2010 0

Silicon Image today announced its enhanced, scalable cineramIC ultra high-definition video decoder. The cineramIC IP core is now capable of decoding up to 4Kx2K 3D at 60 frames per second — the leading edge of digital video technology advancements for prosumer and professional cameras and displays, including support for multi-channel decoding of up to 16 HD video streams simultaneously. The cineramIC IP core is designed for integration into ASIC system-on-chips (SoCs) for next-generation ultra high-definition digital televisions (HDTVs) and set-top-boxes (STBs) as well as prosumer and professional camera applications.

The IP core’s scalable design delivers the following features:

* Dual-stream 4K video decoding (3D at 60 frames per second).
* Support for H.264, MPEG-1/2 and VC-1 decoding standards.
* MVC (Multi-view Video Coding), an extension of H.264 that supports multi-view video for 3D movies, sports and surveillance applications.
* Fully automatic multi-stream decoding for up to 16 HD streams, with error detection and concealment with minimal software processing.
* JPEG decoding of images up to 16Kx8K size at a rate of 9 pictures per second for 32 megapixel (MP) pictures.
* Up to 8Kx4K digital video decoding at 30 frames per second.

In addition to its high performance decoding capabilities, Silicon Image’s cineramIC IP core also supports H.264-MVC, which is designed to decode multi-channel 3D video while maintaining the highest quality. MVC enables the creation of a single video stream from multiple cameras, while maintaining backward compatibility with existing H.264/AVC codecs.

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