Wave Computing is launching a licensing business that combines the company's AI technologies with IPs from MIPS Technologies, acquired by Wave in June.

The Silicon Valley company announced the appointment of Art Swift as President of the company’s MIPS licensing business. Swift will lead all aspects of the company’s MIPS licensing business, including delivery of an AI-enabled IP roadmap that will be available for licensing in early 2019.

Swift is known in the industry for occupying a host of executive positions at high-tech companies and open source foundations. He has been vice president at Esperanto Technologies, president and CEO at Transmeta, vice-chair of the RISC-V Foundation’s Marketing Committee and president of the prpl Foundation. Swift was also vice president of marketing and business development at MIPS Technologies from 2008 to 2011.

Wave CEO Derek Meyer plans to drive Wave’s AI into many use cases and applications. "Our AI will cover from the cloud to the edge, all the way down to low-power embedded IoT devices," Meyer said. "MIPS and Wave’s AI IPs will be the vehicle to carry out such a strategy for MIPS/Wave AI everywhere," he added.

Wave has not disclosed what AI-enabled MIPS IPs would look like.

That said, he added, "RISC-V reminds us of early days of Linux. There are a lot of contributions and collaborations, while everyone is welcome from entry-level engineers to PhD’s," said Swift. MIPS, thanks, to its heritage, has an installed base of "thousands of developers, a lot of support from academia and recognized industrial standing," according to Swift.

Compared to Arm, which is expanding its footprint everywhere from smartphones to AI and IoT, Swift said, "We will take a much more focused approach." MIPS’s focus will be centered on AI.

In contrast to RISC-V, which has so far generated heavy activity on the microcontroller-level with a low-end focus, Swift said MIPS’ strategy will use its multi-threading architecture, cache coherence and heterogenous clusters to its AI advantage.

Wave’s first-generation AI chip — based on a parallel dataflow architecture — is using a 32-bit RISC processor core developed by Taiwan’s Andes Technology Corp. Its second-generation dataflow processing unit (DPU) will use MIPS 64-bit CPU.

The data center version of the new DPU is being developed in collaboration with Broadcom, and will be manufactured on TSMC’s 7nm process technology. The product won’t hit the market until late 2019 to early 2020, according to Meyer.