Kioxia Corp. and its technology and manufacturing partner Western Digital Corp have developed their fifth-generation BiCS FLASH three-dimensional (3D) flash memory with a 112-layer vertically stacked structure.

BiCS5, built on triple-level-cell (TLC) and quad-level-cell (QLC) technologies, delivers exceptional capacity, performance and reliability at a compelling cost.

Kioxia plans to start shipping samples of the new device, which has a 512 gigabit (64 gigabytes) capacity with 3-bit-per-cell (triple-level cell, TLC) technology, for specific applications in the first quarter of calendar year 2020. Production of BiCS5 in meaningful commercial volumes is expected in the second half of calendar 2020.

The new memory will find its way to a wide variety of applications, including traditional mobile devices, consumer and enterprise SSDs, emerging applications enabled by the new 5G networks, artificial intelligence and autonomous vehicles.

Going forward, Kioxia will apply its new fifth-generation process technology to larger capacity devices, such as 1 terabit (128 gigabytes) TLC and 1.33 terabit 4-bit-per-cell (quadruple-level cell, QLC) devices.

Second-generation multi-tier memory hole technology, improved engineering processes and other 3D NAND cell enhancements significantly increase cell array density horizontally across the wafer. These “lateral scaling” advancements in combination with 112 layers of vertical memory capability enables BiCS5 to offer up to 40 percent more bits of storage capacity per wafer compared to the 96-layer BiCS technology, while optimizing cost. New design enhancements also accelerate performance, enabling BiCS5 to offer up to 50 percent faster I/O performance compared to BiCS4.

Fifth-generation BiCS FLASH will be manufactured at Kioxia’s Yokkaichi Plant and the newly built Kitakami Plant.