Intel Responses to AMD's Torrenza Open Socket Strategy
Intel has promised to allow third party hardware vendors two new ways to plug into its processors, which could enable a new market of application accelerators.
At the Intel Developer Forum in San Francisco, Intel's general manager of the Enterprise Technology Group Pat Gelsinger disclosed that Intel has allowed Xilinx and Altera to create so-called Field Programmable Gate Arrays (FPGAs) that connect directly to a processor's front side bus.
An FPGA chip is designed to perform one specific task, for instance to speed up floating point calculations. Having direct access to the front side bus is expected to boost these devices'performance.
The announcement is a direct response to the support that AMD has been building for its Torenza open socket design that allows third party vedors to create co-processors that have access to the same resources as the CPU. The chipmaker last week touted that its standard had attracted interest from enterprise systems vendors including IBM, Sun Microsystems, Dell and HP.
An FPGA chip is designed to perform one specific task, for instance to speed up floating point calculations. Having direct access to the front side bus is expected to boost these devices'performance.
The announcement is a direct response to the support that AMD has been building for its Torenza open socket design that allows third party vedors to create co-processors that have access to the same resources as the CPU. The chipmaker last week touted that its standard had attracted interest from enterprise systems vendors including IBM, Sun Microsystems, Dell and HP.
