BiTMICRO's Next Generation of Solid State Drive Controller
BiTMICRO Networks has gone full cycle in the development of its two new application specific integrated circuit (ASIC) designs, optimized to meet the market need for high-performance, secured and cost-effective SSD solutions.
BiTMICRO's new platform architecture serves as the foundation for its new breed of SSD storage solutions expected to be released soon. A combination of SSD controller and flash channel expander controller, these third-generation ASICs enable BiTMICRO to offer a variety of solid state storage product lines by utilizing one common platform architecture.
The third-generation platform architecture consists of a multi-core SSD controller integrated with multiple high-speed serial on-chip buses and embedded processors, achieving high-speed data transfer between host and storage device. It supports Toggle and ONFI SLC and MLC flash memory devices. In addition, this controller is the only ASIC platform designed with built-in standard I/O cores such as SAS, SATA and PCIe, eliminating the need for a bridge or third party I/O controllers.
The intelligent flash channel expander controller, on the other hand, manages the flash devices and supports multi-block I/O operations over a large array of flash devices, improving parallelism of I/O transfers between the host and flash devices. The scalable architecture allows the number of flash channel expanders to be increased depending on the performance and capacity requirements of a particular application.
BiTMICRO maintains its strategy to design and develop controllers directly to ASIC skipping the FPGA model. ASICs provide designers the flexibility and efficiency in programmability. It also offers higher performance, lower power, mixed-signal integration, and lower unit cost in volume compared to FPGA.
Intended to support both the enterprise and rugged markets, the next-generation SSD storage products are expected to deliver more than 400,000 random write transactions per second, scale up to more than 5TB of pure solid state storage capacity and offered in SAS, SATA, Fibre Channel, and PCIe interfaces. Other features include full data path protection, embedded AES (Advanced Encryption Standard) engines for data security, and other resource optimization features.
The SSD storage device-level products utilizing said ASIC architecture are expected to be ready for market testing by the first half of 2012.
The third-generation platform architecture consists of a multi-core SSD controller integrated with multiple high-speed serial on-chip buses and embedded processors, achieving high-speed data transfer between host and storage device. It supports Toggle and ONFI SLC and MLC flash memory devices. In addition, this controller is the only ASIC platform designed with built-in standard I/O cores such as SAS, SATA and PCIe, eliminating the need for a bridge or third party I/O controllers.
The intelligent flash channel expander controller, on the other hand, manages the flash devices and supports multi-block I/O operations over a large array of flash devices, improving parallelism of I/O transfers between the host and flash devices. The scalable architecture allows the number of flash channel expanders to be increased depending on the performance and capacity requirements of a particular application.
BiTMICRO maintains its strategy to design and develop controllers directly to ASIC skipping the FPGA model. ASICs provide designers the flexibility and efficiency in programmability. It also offers higher performance, lower power, mixed-signal integration, and lower unit cost in volume compared to FPGA.
Intended to support both the enterprise and rugged markets, the next-generation SSD storage products are expected to deliver more than 400,000 random write transactions per second, scale up to more than 5TB of pure solid state storage capacity and offered in SAS, SATA, Fibre Channel, and PCIe interfaces. Other features include full data path protection, embedded AES (Advanced Encryption Standard) engines for data security, and other resource optimization features.
The SSD storage device-level products utilizing said ASIC architecture are expected to be ready for market testing by the first half of 2012.
