Intel introduced the Intel Programmable Acceleration Card (PAC) with Intel Stratix 10 SX FPGA in September 2018.
The card leverages the Acceleration Stack for Intel Xeon CPU with FPGAs, providing data center developers a platform to deploy FPGA-based accelerated workloads. Hewlett Packard Enterprise will be the first OEM to incorporate the Intel PAC with Stratix 10 SX FPGA along with the Intel Acceleration Stack for Intel Xeon Scalable processor with FPGAs into its server offering.
Like the previously announced Intel PAC with Intel Arria 10 FPGA, this new Intel PAC with Stratix 10 SX FPGA supports an ecosystem of design companies that delivers IP to accelerate a wide range of application workloads. The Intel PAC with Stratix 10 SX FPGA is a larger form factor card built for inline processing and memory-intensive workloads, like streaming analytics and video transcoding. While the smaller form factor Intel PAC with Arria 10 FPGA is ideal for backtesting, data base acceleration and image processing workloads.
As the demands for big data and artificial intelligence (AI) increase, Intel says that the reprogrammable technology of the FPGAs meets the processing requirements and changing workloads of data center applications. With reconfigurable logic, memory and digital signal processing blocks, FPGAs can be programmed to execute any type of function with high throughput and real-time performance.
Intel's solution includes:
- Intel-validated Intel Programmable Acceleration Card (PAC) with Intel Stratix 10 SX FPGA.
- Production-grade FPGA Interface Manager (FIM) to which Intel and partner AFUs are connected.
- including a common set of APIs and open-source drivers that work with industry-leading OS, virtualization and orchestration software across the portfolio of Intel programmable acceleration cards.
- Support for native, network-attached workloads.
- Workloads available through acceleration workload storefront for ease of evaluation.