The XIO cell from Rambus is a high-performance, low-latency controller interface to XDR DRAM memory sub-systems. The CMOS macro cell can be seamlessly integrated into a wide variety of target processes. It provides a wide, on-chip, CMOS-level signaling interface to the memory controller logic and a narrow, high-speed Differential Rambus Signaling Level (DRSL) interface to the external XDR memory system.
"Rambus has a long history of designing and delivering very high speed, advanced interface designs that have been broadly used in the industry," said Tom Reeves, vice president of IBM's Semiconductor Products and Solutions, in a statement. "We have worked with them on several projects and are pleased to build upon our existing relationship with this new agreement."