Hardware Makers Join Forces to Promote New High-Performance Interconnect -- Gen-Z
A group of technology companies have formed the Gen-Z Consortium, an industry alliance working to create and commercialize scalable, high-performance fabric technology aimed at simplifying data access at rack scale. This high-performance memory semantic fabric provides a peer-to-peer interconnect that accesses large volumes of data while lowering costs and avoiding today’s bottlenecks. The alliance members include AMD, ARM, Cavium Inc., Cray, Dell EMC, Hewlett Packard Enterprise (HPE), Huawei, IBM, IDT, Lenovo, Mellanox Technologies, Micron, Microsemi, Red Hat, Samsung, Seagate, SK hynix, Western Digital Corporation, and Xilinx. Sitting out of the consortium is Intel, at least for now.
Storage has been typically slow, persistent and reliable, while data in memory is fast but volatile. As new storage class memory technologies emerge that drive the convergence of storage and memory attributes, the programmatic and architectural assumptions that have worked in the past are no longer optimal. The challenges associated with explosive data growth, real-time application demands, the emergence of low latency storage class memory, and demand for rack scale resource pools require a new approach to data access.
Gen-Z will have a new connector, fabric and data transfer protocol. One goal is to create an open standard so new forms of memory can communicate with processors and accelerators in a coherent manner. Gen-Z will also work with SSDs like QuantX from Micron (Micron's 3D Xpoint storage will ship in SSDs branded QuantX.)
Gen-Z provides a simplified interface based on memory semantics, scalable from tens to several hundred GB/s of bandwidth, with sub-100 ns load-to-use memory latency.
It enables data centric computing with scalable memory pools and resouIt ces for real-time analytics and in-memory applications.
Gen-Z is also software compatible with no required changes to the operating system. It scales from simple, low cost connectivity to highly capable, rack scale interconnect.
The new architecture will be targeted at servers and data centers first. and it's not certain whether it will come to PCs.
At its highest speed, Gen-Z could be connected as a point-to-point bus in a server enclosure. It could also be used to connect servers, storage and memory arrays in a rack.
Today, servers come with storage, memory and processing in one box, and that's a limitation. It will be possible to decouple them into separate boxes with Gen-Z as a connector. Larger pools of storage, memory and processing can be dedicated to each discrete box. That will help applications like SAP HANA, which relies on in-memory processing.
Gen-Z is an open specification, and will be compatible with 3D Xpoint, which will form the basis for Intel's upcoming Optane storage and memory products. But it seems that Intel is trying to protect its own OmniPath technology, a proprietary architecture and interconnect, which Gen-Z will compete against. Intel is also pushing silicon photonics in order to wire up servers in data centers.
The core specification, covering the architecture and protocol, will be finalized in late 2016.