The Linux Foundation and the RISC-V Foundation announced a joint collaboration project to promote open source development and commercial adoption of the RISC-V instruction set architecture (ISA).
RISC-V is a royalty-free ISA developed principally by researchers at UC Berkeley that is gaining popularity in Internet of Things (IoT), low-power, and embedded applications. Designs for higher-power use cases are also available. The Hi-Five Unleashed single-board computers feature a quad-core 1.5 GHz RISC-V CPU capable of directly running Linux.
"With the rapid international adoption of the RISC-V ISA, we need increased scale and resources to support the explosive growth of the RISC-V ecosystem. The Linux Foundation is an ideal partner given the open source nature of both organizations," said Rick O’Connor, executive director of the non-profit RISC-V Foundation. "This joint collaboration with the Linux Foundation will enable the RISC-V Foundation to offer more robust support and educational tools for the active RISC-V community, and enable operating systems, hardware implementations and development tools to scale faster."
Since its inception in 2015, RISC-V has evolved its ecosystem to feature technology companies and emerging startups all working together to enable open-source and proprietary RISC-V hardware and software solutions. Members are solving complex design challenges including security, performance, power, efficiency, flexibility and more.
In addition to neutral governance, The Linux Foundation will also provide an influx of resources for the RISC-V ecosystem, such as training programs, infrastructure tools, as well as community outreach, marketing and legal expertise.
The RISC-V ISA offers a number of advantages over other architectures, including its openness, simplicity, clean-slate design, modularity, extensibility and stability. RISC-V is not subject to patent encumbrances, and is available under the BSD license. With this license, organizations that wish to implement or extend RISC-V in commercial products are not compelled to disclose their changes to the community at large. This makes it appealing for commercial use in embedded devices, as licensing fees for Arm or MIPS ISAs can be avoided by using RISC-V. Likewise, RISC-V CPUs are not restricted to a single manufacturer.
The Linux Foundation and the RISC-V communities are already collaborating on a pair of “Getting Started” guides for running the Zephyr, a small, scalable open source RTOS for connected, resource constrained devices, and Linux operating systems on RISC-V based platforms. The Zephyr and Linux guides will be unveiled at the RISC-V Summit on Dec. 3, 2018, in Santa Clara during training classes led by project contributors from RISC-V Foundation Founding Platinum Members Antmicro, Google, Microchip Technology and Western Digital, in addition to the Linux Foundation.
NVIDIA is planning to use RISC-V as the basis for the next-generation version of their Falcon microcontroller. Similarly, Western Digital plans to adopt RISC-V for drive controllers, and projects involving on-disk computing capabilities. The company has pledged to transition "its own consumption of processors - over one billion cores per year - to RISC-V."