Panasonic's New Unifier LSI For TVs is Smaller, More energy Efficient
Panasonic, has developed a new-generation of its UniPhier system LSI for HDTVs that integrates new AV data compression/decompression technology.
The company will start shipments of the new 45-nm "MN2WS0052" LSI this month.
This new-generation UniPhier is equipped with high performance for processing motion/still image data and further improves the technology with the addition of an AV codec that responds to the next-generation image data compression standard, such as MPEG 4 AVC/H.264/MPEG-2, ideal for handling high-definition images. AAC, HE-AAC (European HQ audio standard) in addition to Dolby Digital, Dolby Digital plus, as well as the European Digital Television standard are also supported. The company claims that the LSI is compatible with the 98% of the worldwide HDTV standards.
Panasonic's UniPhier LSI enables enables three 1080p (1920X1080) high-definition (HD) screens to be processed simultaneously.
Using a unified memory architecture technology (integrated memory controller) allowed a reduction of about 50% in the major semiconductor parts and an easier integration of LSIs into a single chip using the 45-nanometer process technology.
Two 32bit CPUs are built into the LSI's core, running at 300MHz. They both handle media processing as well as networking processes.
This new-generation UniPhier is equipped with high performance for processing motion/still image data and further improves the technology with the addition of an AV codec that responds to the next-generation image data compression standard, such as MPEG 4 AVC/H.264/MPEG-2, ideal for handling high-definition images. AAC, HE-AAC (European HQ audio standard) in addition to Dolby Digital, Dolby Digital plus, as well as the European Digital Television standard are also supported. The company claims that the LSI is compatible with the 98% of the worldwide HDTV standards.
Panasonic's UniPhier LSI enables enables three 1080p (1920X1080) high-definition (HD) screens to be processed simultaneously.
Using a unified memory architecture technology (integrated memory controller) allowed a reduction of about 50% in the major semiconductor parts and an easier integration of LSIs into a single chip using the 45-nanometer process technology.
Two 32bit CPUs are built into the LSI's core, running at 300MHz. They both handle media processing as well as networking processes.
