ARM, HP and SK hynix To Participate On The Development Of Memory Cube
ARM, HP, and SK hynix, Inc. have joined the global effort to accelerate widespread industry adoption of Hybrid Memory Cube (HMC) technology.
The companies have joined the Hybrid Memory Cube Consortium (HMCC). Led by Micron and Samsung, the HMCC is a collaboration of original equipment manufacturers (OEMs), enablers and integrators who are cooperating to develop and implement an open interface standard for the new memory technology.
Micron and Samsung are working closely with Altera, IBM, Microsoft, Open-Silicon, Xilinx and now ARM, HP and SK hynix ? to draft an industry-wide specification that should pave the way for a wide range of electronic advances.
"The strong collection of companies who have joined the consortium ? representing a broad range of technology interests ? reflects the perceived high value of HMC as the next standard for high-performance memory applications," said Robert Feurle, Micron's vice president for DRAM marketing. "With the addition of ARM, HP and SK hynix as developers, who will help to determine the specific features, the consortium is well positioned to provide a new open standard for next-gen electronics."
HMC features will enable highly efficient memory solutions for applications ranging from industrial products to high-performance computing and large-scale networking. The HMCC's team of developers plans to deliver a draft interface specification to the growing number of "adopters" joining the consortium. Then, the combined team of developers and adopters will refine the draft and release a final interface specification, currently targeted for the end of this year.
As envisioned, HMC capabilities will leap beyond current and near-term memory architectures in the areas of performance, packaging and power efficiencies, offering a major alternative to present memory technology.
One of the primary challenges facing the industry -- and a key motivation for forming the HMCC -- is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide. The term "memory wall" has been used to describe this challenge. Breaking through the memory wall requires architecture such as HMC that can provide increased density and bandwidth with significantly lower power consumption.
Micron and Samsung are working closely with Altera, IBM, Microsoft, Open-Silicon, Xilinx and now ARM, HP and SK hynix ? to draft an industry-wide specification that should pave the way for a wide range of electronic advances.
"The strong collection of companies who have joined the consortium ? representing a broad range of technology interests ? reflects the perceived high value of HMC as the next standard for high-performance memory applications," said Robert Feurle, Micron's vice president for DRAM marketing. "With the addition of ARM, HP and SK hynix as developers, who will help to determine the specific features, the consortium is well positioned to provide a new open standard for next-gen electronics."
HMC features will enable highly efficient memory solutions for applications ranging from industrial products to high-performance computing and large-scale networking. The HMCC's team of developers plans to deliver a draft interface specification to the growing number of "adopters" joining the consortium. Then, the combined team of developers and adopters will refine the draft and release a final interface specification, currently targeted for the end of this year.
As envisioned, HMC capabilities will leap beyond current and near-term memory architectures in the areas of performance, packaging and power efficiencies, offering a major alternative to present memory technology.
One of the primary challenges facing the industry -- and a key motivation for forming the HMCC -- is that the memory bandwidth required by high-performance computers and next-generation networking equipment has increased beyond what conventional memory architectures can provide. The term "memory wall" has been used to describe this challenge. Breaking through the memory wall requires architecture such as HMC that can provide increased density and bandwidth with significantly lower power consumption.
