IBM, Chartered, Infineon And Samsung Announce Process And Design Readiness For Silicon Circuits On 45nm Low-Power Technology
IBM, Chartered Semiconductor Manufacturing, Infineon Technologies, and Samsung
Electronics Co., Ltd. today announced first silicon-functional circuits and the availability of design kits based on their collaboration for 45nm low-power process technology.
The early characterization of key design elements in silicon, coupled with the
availability of early design kits, provide designers with a significant head start
in moving to the latest process from the industry-leading CMOS technology research
and development alliance. The early design kits are developed through a
collaborative effort by all four companies and are immediately available for
select customers.
The first working circuits in 45nm technology, targeted at next-generation communication systems, were proven in silicon using the process technology jointly developed by the alliance partners and were produced at the IBM 300-millimeter (mm) fabrication line in East Fishkill, NY, where the joint development team is based. Among the successfully verified blocks are standard library cells and I/O elements provided by Infineon, as well as embedded memory developed by the alliance. Infineon has included special circuitry on the first 300mm wafers to debug the complex process and to gain experience in product architecture interactions.
The 45nm low-power process is expected to be installed and fully qualified at Chartered, IBM and Samsung 300mm fabs by the end of 2007.
The first working circuits in 45nm technology, targeted at next-generation communication systems, were proven in silicon using the process technology jointly developed by the alliance partners and were produced at the IBM 300-millimeter (mm) fabrication line in East Fishkill, NY, where the joint development team is based. Among the successfully verified blocks are standard library cells and I/O elements provided by Infineon, as well as embedded memory developed by the alliance. Infineon has included special circuitry on the first 300mm wafers to debug the complex process and to gain experience in product architecture interactions.
The 45nm low-power process is expected to be installed and fully qualified at Chartered, IBM and Samsung 300mm fabs by the end of 2007.