Micron's Hybrid Memory Technology Said To Significantly Increase Chip Speed
Micron Technology is expected to announce the Hybrid Memory Cube (HMC) technology, which maximizes the full potential of super-computing and advanced networking systems.
The company combined fast logic process technology and advanced DRAM designs to create an entirely new category the company is calling Hybrid Memory Cube (HMC) technology.
The end result is a high bandwidth, low energy, high-density memory system that's unlike anything on the market today - a boost performance 20-fold over the memory chips used in PCs today, the company claims.
Targeted initially at networking and high-performance computers, HMC will enrich next-generation networking and enable exaflop-scale supercomputing.
Specifically, a single HMC can provide more than 20x the performance of a DDR3 module, it is exponentially more efficient than current memory?using just one-tenth as much energy per bit while it will allow for design of smaller physical systems, since HMC's stacked architecture uses nearly 90% less space than today?s RDIMMs.
Generally, the performance of DRAM depends on the bandwidth of the data channel that connects the memory and the processor. Micron placed a memory controller into the memory in order to overcome the bandwidth constrains of the bus that connects the controller chip to the CPU.
The first devices (CPUs?) that will take advantage of the new Hybrid Memory Cube technology are expected to be available next year, but they are expected to find their way toward the consumer space by 2015. For now, the company will focus in offering the technology in networking and cloud computing devices such as 100-gigabit Ethernet routers.
The end result is a high bandwidth, low energy, high-density memory system that's unlike anything on the market today - a boost performance 20-fold over the memory chips used in PCs today, the company claims.
Targeted initially at networking and high-performance computers, HMC will enrich next-generation networking and enable exaflop-scale supercomputing.
Specifically, a single HMC can provide more than 20x the performance of a DDR3 module, it is exponentially more efficient than current memory?using just one-tenth as much energy per bit while it will allow for design of smaller physical systems, since HMC's stacked architecture uses nearly 90% less space than today?s RDIMMs.
Generally, the performance of DRAM depends on the bandwidth of the data channel that connects the memory and the processor. Micron placed a memory controller into the memory in order to overcome the bandwidth constrains of the bus that connects the controller chip to the CPU.
The first devices (CPUs?) that will take advantage of the new Hybrid Memory Cube technology are expected to be available next year, but they are expected to find their way toward the consumer space by 2015. For now, the company will focus in offering the technology in networking and cloud computing devices such as 100-gigabit Ethernet routers.
