Intel Announces New SATA Solid-State Drive, Pushes Multi-Core To Mainstream
Earlier this week Intel announced its latest solid-state drive (SSD), the Intel Solid-State Drive 710 Series, a new "Near Threshold Voltage Processor" a "Parallel JS" engine, a Hybrid Memory Cube and described the expansion of multi- and many-core computing beyond HPC.
Intel's 710 Series is a Multi-Level Cell (MLC) data center SSD and replacement for the Intel X25-E Extreme SSD. While the Intel X25-E was based on more expensive but reliable Single-Level Cell (SLC) NAND flash memory, the Intel SSD 710 uses Intel 25-nanomenter (nm) MLC NAND flash memory with Intel High Endurance Technology (HET) to deliver the endurance and performance necessary for data centers.
Intel claims that the new 710 SSD delivers nearly the same endurance as SLC-based NAND SSDs, yet utilizes the higher capacity and more cost-effective MLC NAND. It achieves write endurance out-of-the-box of up to 1.1 Petabytes (PB) and comes in 100-Gigabyte (GB), 200GB and 300GB capacities. Targeted for I/O-starved applications, the Intel SSD 710 achieves a 4K random write performance of up to 2,700 input/output operations per second (IOPS) and 4K random read performance of up to 38,500 IOPS across the full span of the drive.
The Intel SSD 710 also includes increased reliability and security features. These include enhanced power-loss data protection to reduce potential data loss during a power failure; added data security with surplus NAND flash memory to provide system protection should a NAND die fail; Advanced Encryption Standard (AES) with 128-bit pre-configured encryption technology to protect the data from an external threat or internal system issues and Temperature Monitoring and Logging containing an internal temperature sensor that can be monitored using two self-monitoring analysis and report technology (SMART) attributes to prevent downtime.
Positioned for high write usage models, the drive can also be over-provisioned by the user to achieve up to 80 percent greater write endurance, creating an outstanding storage value. Intel HET combines NAND silicon enhancements and unique SSD NAND management techniques to extend the write endurance of MLC-based SSDs. Intel HET comprises Intel-developed firmware, controller and high-cycling NAND for optimized endurance and performance for the heavy loads of data crunching and writing experienced in 24/7 data centers or scientific, financial or other high-intensity usage models. Firmware enhancements from Intel include optimized error avoidance techniques, write amplification reduction algorithms and system-level error management beyond the normal industry Error Correction Code (ECC) standards.
Providing a better dollar-per-GB value than its previous-generation Intel X25-E SSD, the Intel SSD 710 Series is priced at $649 for the 100GB version, $1,289 for the 200GB, and $1,929 for 300GB, all based on 1,000-unit quantities. It is backed by a 3-year limited warranty.
Multi-Core Goes Mainstream, Computing Pushed to Extremes
Citing the impact of multi- and many-core computing hitting the mainstream and new developments in extreme scale computing as examples, Justin Rattner, Intel's chief technology officer, told an Intel Developer Forum audience that the future of computing is being accelerated.
"Since 2006 Intel and the IA developer community have worked in partnership to realize the potential of multi- and many-core computing, with accelerating impact beyond high-performance computing to solving a wide range of real-world computing problems on clients and servers," Rattner said during his Day 3 keynote in San Francisco. "What we have demonstrated today only scratches the surface of what will be possible with many-core and extreme scale computing systems in the future."
Rattner demonstrated a Near-Threshold Voltage Processor using ultra-low voltage circuits that dramatically reduce energy consumption by operating close to threshold, or turn-on voltage, of the transistors. This concept CPU runs fast when needed but drops power to below 10 milliwatts when its workload is light - low enough to keep running while powered only by a solar cell the size of a postage stamp. While the research chip will not become a product itself, the results of this research could lead to the integration of scalable near-threshold voltage circuits across a wide range of future products, reducing power consumption by 5-fold or more and extending always-on capability to a wider range of computing devices.
The Hybrid Memory Cube, a concept DRAM developed by Micron in collaboration with Intel, demonstrates a new approach to memory design delivering a 7-fold improvement in energy-efficiency over today's DDR3. Hybrid Memory Cube uses a stacked memory chip configuration, forming a compact "cube," and uses a new, highly efficient memory interface which sets the bar for energy consumed per bit transferred while supporting data rates of one trillion bits per second. This research could lead to dramatic improvements in servers optimized for cloud computing as well as ultrabooks, televisions, tablets and smartphones
Multi-core, the practice of building more than one processing engine into a single chip, has become the accepted method to increase performance while keeping power consumption low. While many-core is more of a design perspective, rather than incrementally adding cores in a traditional approach, it's reinventing chip design based on the assumption that high core counts is the new norm.
Rattner highlighted the progress multi-core computing has seen since he introduced Intel's first dual-core processor at IDF 5 years ago. Today Intel's multi- and many-core processors are hosting a myriad of important applications across a wide range of industry sectors, including some surprising new uses in the rapidly advancing world of high-core-count computing.
Rattner described some of the latest applications of this technology along with the software tools and programming techniques that are enabling developers to harness the power of multi- and many-core computing in several key areas, including:
- Faster Web Apps: Extending JavaScript with data-parallel programming features, using a just-released experimental Parallel JS open-source engine from Intel Labs, to enable a new class of browser-based apps in domains such as photo and video editing, physics simulation, and 3-D gaming for desktop and mobile personal computers, including Ultrabooks.
- More Responsive Cloud Services: Best-in-class increases in queries per second for Memcached applications using the multi-core capabilities of Intel's 2nd Generation Intel Core microprocessor to enable the world's largest Internet sites to improve their Web app responsiveness and minimize user wait times for critical data.
- Improved PC Client Security: Parallel cryptographic and facial recognition services to improve security on Ultrabooks and traditional notebook and desktop personal computers by utilizing all of the IA and graphics cores on 2nd Generation Intel Core microprocessors in a heterogeneous fashion.
- Lower Cost Wireless Infrastructure: Collaborative research with China Mobile to replace the custom and costly base-station hardware used on cell towers today with a fully programmable and far more cost-effective, software-based PC alternative.
- Really Big Science: Unlocking the mysteries of the universe by utilizing clusters of Intel multi-core processors at CERN to greatly improve their high-energy physics app performance and to quickly port their code to Intel's upcoming Many Integrated Core (MIC) architecture product family.
Intel claims that the new 710 SSD delivers nearly the same endurance as SLC-based NAND SSDs, yet utilizes the higher capacity and more cost-effective MLC NAND. It achieves write endurance out-of-the-box of up to 1.1 Petabytes (PB) and comes in 100-Gigabyte (GB), 200GB and 300GB capacities. Targeted for I/O-starved applications, the Intel SSD 710 achieves a 4K random write performance of up to 2,700 input/output operations per second (IOPS) and 4K random read performance of up to 38,500 IOPS across the full span of the drive.
The Intel SSD 710 also includes increased reliability and security features. These include enhanced power-loss data protection to reduce potential data loss during a power failure; added data security with surplus NAND flash memory to provide system protection should a NAND die fail; Advanced Encryption Standard (AES) with 128-bit pre-configured encryption technology to protect the data from an external threat or internal system issues and Temperature Monitoring and Logging containing an internal temperature sensor that can be monitored using two self-monitoring analysis and report technology (SMART) attributes to prevent downtime.
Positioned for high write usage models, the drive can also be over-provisioned by the user to achieve up to 80 percent greater write endurance, creating an outstanding storage value. Intel HET combines NAND silicon enhancements and unique SSD NAND management techniques to extend the write endurance of MLC-based SSDs. Intel HET comprises Intel-developed firmware, controller and high-cycling NAND for optimized endurance and performance for the heavy loads of data crunching and writing experienced in 24/7 data centers or scientific, financial or other high-intensity usage models. Firmware enhancements from Intel include optimized error avoidance techniques, write amplification reduction algorithms and system-level error management beyond the normal industry Error Correction Code (ECC) standards.
Providing a better dollar-per-GB value than its previous-generation Intel X25-E SSD, the Intel SSD 710 Series is priced at $649 for the 100GB version, $1,289 for the 200GB, and $1,929 for 300GB, all based on 1,000-unit quantities. It is backed by a 3-year limited warranty.
Multi-Core Goes Mainstream, Computing Pushed to Extremes
Citing the impact of multi- and many-core computing hitting the mainstream and new developments in extreme scale computing as examples, Justin Rattner, Intel's chief technology officer, told an Intel Developer Forum audience that the future of computing is being accelerated.
"Since 2006 Intel and the IA developer community have worked in partnership to realize the potential of multi- and many-core computing, with accelerating impact beyond high-performance computing to solving a wide range of real-world computing problems on clients and servers," Rattner said during his Day 3 keynote in San Francisco. "What we have demonstrated today only scratches the surface of what will be possible with many-core and extreme scale computing systems in the future."
Rattner demonstrated a Near-Threshold Voltage Processor using ultra-low voltage circuits that dramatically reduce energy consumption by operating close to threshold, or turn-on voltage, of the transistors. This concept CPU runs fast when needed but drops power to below 10 milliwatts when its workload is light - low enough to keep running while powered only by a solar cell the size of a postage stamp. While the research chip will not become a product itself, the results of this research could lead to the integration of scalable near-threshold voltage circuits across a wide range of future products, reducing power consumption by 5-fold or more and extending always-on capability to a wider range of computing devices.
The Hybrid Memory Cube, a concept DRAM developed by Micron in collaboration with Intel, demonstrates a new approach to memory design delivering a 7-fold improvement in energy-efficiency over today's DDR3. Hybrid Memory Cube uses a stacked memory chip configuration, forming a compact "cube," and uses a new, highly efficient memory interface which sets the bar for energy consumed per bit transferred while supporting data rates of one trillion bits per second. This research could lead to dramatic improvements in servers optimized for cloud computing as well as ultrabooks, televisions, tablets and smartphones
Multi-core, the practice of building more than one processing engine into a single chip, has become the accepted method to increase performance while keeping power consumption low. While many-core is more of a design perspective, rather than incrementally adding cores in a traditional approach, it's reinventing chip design based on the assumption that high core counts is the new norm.
Rattner highlighted the progress multi-core computing has seen since he introduced Intel's first dual-core processor at IDF 5 years ago. Today Intel's multi- and many-core processors are hosting a myriad of important applications across a wide range of industry sectors, including some surprising new uses in the rapidly advancing world of high-core-count computing.
Rattner described some of the latest applications of this technology along with the software tools and programming techniques that are enabling developers to harness the power of multi- and many-core computing in several key areas, including:
- Faster Web Apps: Extending JavaScript with data-parallel programming features, using a just-released experimental Parallel JS open-source engine from Intel Labs, to enable a new class of browser-based apps in domains such as photo and video editing, physics simulation, and 3-D gaming for desktop and mobile personal computers, including Ultrabooks.
- More Responsive Cloud Services: Best-in-class increases in queries per second for Memcached applications using the multi-core capabilities of Intel's 2nd Generation Intel Core microprocessor to enable the world's largest Internet sites to improve their Web app responsiveness and minimize user wait times for critical data.
- Improved PC Client Security: Parallel cryptographic and facial recognition services to improve security on Ultrabooks and traditional notebook and desktop personal computers by utilizing all of the IA and graphics cores on 2nd Generation Intel Core microprocessors in a heterogeneous fashion.
- Lower Cost Wireless Infrastructure: Collaborative research with China Mobile to replace the custom and costly base-station hardware used on cell towers today with a fully programmable and far more cost-effective, software-based PC alternative.
- Really Big Science: Unlocking the mysteries of the universe by utilizing clusters of Intel multi-core processors at CERN to greatly improve their high-energy physics app performance and to quickly port their code to Intel's upcoming Many Integrated Core (MIC) architecture product family.
