JEDEC Updates e-MMC Standard
JEDEC Solid State Technology Association today announced the publication of JESD84-A441: Embedded MultiMediaCard (eMMC) Product Standard v4.41.
The new v4.41 contains corrections of critical errata found in the previous v4.4 specification, and offers new, optional features that designers may utilize to improve system performance. The v4.41 update is a replacement of v4.4 which is now considered obsolete, JEDEC said. JESD84-A441 is available for free download at www.jedec.org.
eMMC is an embedded non-volatile memory system designed for a wide range of applications in consumer electronics, navigational systems and other industrial uses. It is comprised of both flash memory and a flash memory controller, which simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by simplifying the non-volatile memory interface design and qualification process, resulting in a reduction in time-to-market as well as facilitating support for future flash device offerings.
The updated eMMC v4.41 offers new options for enhancing device performance, including a high priority interrupt mechanism (HPI) and host-controlled background operations processing (BO). HPI enables the host device to interrupt a potentially time-consuming operation, such as writing a large file, in order to execute a high-priority read operation from the eMMC, then later return to the interrupted activity. BO allows the eMMC to give an indication to the host device when a background flash clean-up operation is needed to maintain eMMC device performance. The host device can then allocate time for eMMC to perform the background operation in a controlled manner at a convenient time. Both features offer designers additional options to improve device performance for the end user.
eMMC is an embedded non-volatile memory system designed for a wide range of applications in consumer electronics, navigational systems and other industrial uses. It is comprised of both flash memory and a flash memory controller, which simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by simplifying the non-volatile memory interface design and qualification process, resulting in a reduction in time-to-market as well as facilitating support for future flash device offerings.
The updated eMMC v4.41 offers new options for enhancing device performance, including a high priority interrupt mechanism (HPI) and host-controlled background operations processing (BO). HPI enables the host device to interrupt a potentially time-consuming operation, such as writing a large file, in order to execute a high-priority read operation from the eMMC, then later return to the interrupted activity. BO allows the eMMC to give an indication to the host device when a background flash clean-up operation is needed to maintain eMMC device performance. The host device can then allocate time for eMMC to perform the background operation in a controlled manner at a convenient time. Both features offer designers additional options to improve device performance for the end user.
