Toshiba has developed the first BiCS FLASH three-dimensional (3D) flash memory utilizing Through Silicon Via (TSV) technology with 3-bit-per-cell (triple-level cell, TLC) technology.

The company started shipments of prototypes for development purposes last month, and product samples are scheduled for release in the second half of 2017.
The prototype of this device will be showcased at the 2017 Flash Memory Summit in Santa Clara, California, United States, from August 7-10.

Devices fabricated with TSV technology have vertical electrodes and vias that pass through silicon dies to provide connections, an architecture that realizes high speed data input and output while reducing power consumption. Real-world performance has been proven previously, with the introduction of Toshiba's 2D NAND Flash memory.

Combining a 48-layer 3D flash process and TSV technology has allowed Toshiba Memory Corporation to successfully increase product programming bandwidth while achieving low power consumption. According to the Japanese company, the power efficiency of a single package is approximately twice that of the same generation BiCS FLASH memory fabricated with wire-bonding technology. TSV BiCS FLASH also enables a 1-terabyte (TB) device with a 16-die stacked architecture in a single package.

BiCS FLASH with TSV technology can be used in storage applications requiring low latency, high bandwidth and high IOPS/Watt, such as high-end enterprise SSDs.

General Specifications (Prototype)

• Package Type: NAND Dual x8 BGA-152
• Storage Capacity: 512 GB, 1TB
• Number of Stacks: 8 (512GB), 16 (1TB)
• External Dimensions:
  • 14 x 18 x 1.35 mm (512GB)
  • 14 x 18 x 1.85 mm (1TB)
• Interface: Toggle DDR
• Interface Max. Speed:1066Mbps