Micron Technology today announced the creation of the Xccela Consortium for semiconductor and electronics companies.

The mission of the consortium is to promote the Xccela Bus interface as an open standard for a new type of digital interconnect and data communications bus suitable for volatile and nonvolatile memories as well as other types of integrated circuits (e.g. MCUs, SoCs, ADCs, etc.). To better highlight the accelerated performance that applications can achieve by using the bus and supported devices, Micron has rebranded its previously announced XTRMFlash and XTRMBus to Xccela Flash and Xccela Bus.

Micron, Winbond Electronics, GigaDevice Semiconductor, and AP Memory Technology are the initial members of the consortium and will work with other member companies to accelerate the industry efforts to bring a broad set of Xccela Bus compliant memories, controllers, ASICs, SoCs, and other devices to the market.

"Current system bus interfaces often require the tradeoff between performance and footprint, either the high performance of a high pin-count parallel interface or the small active signal footprint of a serial interface. Xccela Bus changes that," Micron says.

The Xccela Bus combines accelerated performance with a small signal count. In its first iteration, the Xccela Bus is a high-speed, high-performance Octal SPI bus that uses eight data lines for command and data transfer. The bus is synchronous and supports both single-transfer rate (STR) operation, where one byte of data is transferred every clock cycle, and dual-data rate (DDR) operation in which two bytes of data are transferred every clock cycle. The DDR operation requires the use of a data strobe signal (DQS). The Xccela Bus supports clock frequencies up to 200MHz and data transfer rates up to 400MB/sec (3.2Gbps).

The Xccela Consortium is open to all adopters, including semiconductor and electronics companies. Members have access to the initial specifications and can participate in the future specification definition and development.