Fully depleted silicon-on-insulator (FD-SOI) could grow rapidly in the wake of Globalfoundries’ plans for a 12nm process, and paplications processors and modems could adopt advanced 12nm FD-SOI as an alternative to 10nm and potentially 7nm FinFETs. Of course, the adoption of FD-SOI depends on whether Globalfoundries'recently announced FD-SOI 12nm process comes early in the market, and on Samsung's plans for FD-SOI.
The FinFET processes adopted by top chip makers Intel, Samsung and TSMC provide the highest performance and lowest power consumption. However in a 14nm equivalent, FD-SOI supports 16.8% lower cost per gate than FinFETs. It also provides about 25% lower design cost and risk of needing a re-spin.
In addition, FD-SOI has the ability to dynamically manage power consumption through biasing. The process also delivers superior support for RF given a significantly higher cut-off frequency than FinFETs.
Globalfoundries says it plans to start working with customers for its 12nm FD-SOI process until 2019, although this decision could change.
Whether China based fabs owned by Samsung may adopt FD-SOI will be a key factor for future of FD-SOI. On the other hand, if the process is only available from Globalfoundries, it could grow to as much as a quarter of the advanced-node business.
Chinese Hua Li has a new fab in the works in Shanghai. They will get as much as $5.8 billion from the China government to build a new fab. What's not known is which process they will choose, although there is a reasonable possibility to do FD-SOI.
SMIC, China’s most advanced locally owned fab, is not likely to adopt FD-SOI. It is focused on ramping 28nm processes in high-k metal gate and polysilicon flavors.
According to industry sources, it is clear that the 28nm in various flavors will be the biggest winner through 2025 in terms of wafer shippings, as it still offers the lowest lowest cost per transistor of any other node.
Regarding FinFET processes, Apple is said to be using TSMC’s 16FF+ process for the A10 chip in the recently announced iPhone 7. It is expected to use TSMC’s 10nm FinFET node for its A11 chip in the iPhone 8 which could start production next year.
However, the cost per gate with each new FinFET process will be increased, due to its complexity and thus lower yields.
For its part, TSMC is unlikely to license FD-SOI, but it could rrespond to competitive pressure by offering advanced multichips based on the InFlo packaging process.
Overall, it's a bit too early and risky to determine what share FinFET, FD-SOI and planar processes will take.