A Look At AMD's Updated Chip Roadmap
Yesterday we talked about AMD's focus on the Zen-based CPU architecture for 2016 - let's dig into some more details today related to the next-gen APU "Bristol Ridge," the Zen-based CPU "Summit Ridge" and AMD's focus on offering products for the data center market. For the desktop, the "Vishera" AMD FX CPUs (AM3) as well as the "Kaveri" APUs will be replaced by ther all new "Summit Ridge" AMD FX CPus, which will be based on the new "Zen" CPU cores (AM4). In addition, 2016 willsee the launch of the 7th generation A-series desktop APUs, called "Bristol Ridge" (AM4). Bristol Ridge appears to be a refresh of Carrizo given that AMD has not announced any new CPU cores other than "Zen" and "K12."
AMD promises that Bristol Ridge will offer performance-per-watt gains. But AMD has not disclosed what process node and what generation of GCN graphics cores that Bristol Ridge will offer.
On the mobile side, AMD will relesaed the 7th generation Bristol Ridge mobile APus, which will follow in Carrizo’s footsteps and be offered as a SoC in the FP4 socket.
As we have previously saw, AMD will reduce the number of sockets used by its products. For its desktop products there will be a single socket dubbed AM4.
Bristol Ridge will offer compatibility will both DDR3 and DDR4 memory in the AM4 socket and Summit Ridge will only offer support for DDR4.
AMD's neew GPUs are also set to support 2nd generation High Bandwidth Memory (HBM 2) as well as VR/AR acceleration features.
Also intersting is AMD's roadmap for the data center segment. There will be Zen-based Opteron chips, K12-based high performance server chips, and a high-performance server class APU.
Following the appearance of the Zen core in late 2016 on the desktop inside of the Summit Ridge CPU, the new cores will eventually find their way to new Opteron branded chips, sometime in the first half of 2017.
AMD says that the new Zen-based Opteron chips will offer a high core count with multi-threading (SMT), disruptive memory bandwidth and high native I/O capacity. Unforunately, the company has not provided more details on these features. Disruptive memory bandwidth would seem to imply the use of advanced memory technologies like High Bandwidth memory (HBM2) and high native I/O capacity could imply any number of thing including an integrated networking controller like AMD’s Opteron A1100 series chips offer. But those have not yet been confirmed.
AMD’s next-gen ARM chips will feature K12 cores, they will power highest performance ARM servers, and they will be designed for efficiency.
AMD is also planning to release a high-performance server APU that will offer "multi-teraflops" for HPC and workstations. Sp expect
a chip that will offer at least 2 TFLOP/s of single precision compute. AMD also mentioned a "transformational memory architecture" and "scale-up graphics performance."
The company also AMD also notes that it plans to work on semi-custom projects for datacenter chips.