Micron's Hybrid Memory Cube Gets Into Supercomputers
Micron Technology is planning to adapt its Hybrid Memory Cube (HMC) for petascale supercomputer systems, representing a step forward in memory technology.
HMC is designed for applications requiring low-energy, high-bandwidth access to memory, which is the most important requirement for supercomputers. Other applications include data packet processing, data packet buffering or storage, and processor acceleration.
Micron and Fujitsu, a global leader in supercomputing, will each exhibit a display board that features HMC devices in Fujitsu's next-generation supercomputer prototype at the Supercomputing '13 Conference in Denver, November 19?21.
HMC uses advanced through-silicon vias (TSVs) - vertical conduits that electrically connect a stack of individual chips - to combine high-performance logic with Micron's DRAM. Micron's HMC delivers a 160 GB/s of memory bandwidth while using up to 70 percent less energy per bit than existing technologies, which lowers total cost of ownership (TCO).
Micron expects volume production of both the 2GB and 4GB HMC devices later in 2014.
Micron and Fujitsu, a global leader in supercomputing, will each exhibit a display board that features HMC devices in Fujitsu's next-generation supercomputer prototype at the Supercomputing '13 Conference in Denver, November 19?21.
HMC uses advanced through-silicon vias (TSVs) - vertical conduits that electrically connect a stack of individual chips - to combine high-performance logic with Micron's DRAM. Micron's HMC delivers a 160 GB/s of memory bandwidth while using up to 70 percent less energy per bit than existing technologies, which lowers total cost of ownership (TCO).
Micron expects volume production of both the 2GB and 4GB HMC devices later in 2014.
