Samsung's device Solution (DS) division, which oversees the semiconductor business, is building R&D for Fan-Out & Wafer-Level Package (Fo-WLP) and pilot lines.
The company's goal is to apply Fo-WLP technology to the next-generation Premium Exynos Application Processor (AP) for the Galaxy S11, which is scheduled to be launched next year.
The chip maker has reportedly ordered equipment to start performing the fan-out process at the WLP level in its Cheonan package site. The company targets to produce R&D-level samples of the high-performance AP packages utilizing the Fo-WLP process by the end of this year, and commercialize the technology by 2020.
Fan-Out WLP takes individual die and embeds them in a low cost material such as epoxy mold compound (EMC) with space allocated between each die for additional I/O connection points – avoiding the use of relatively expensive Si real estate to accommodate a high I/O count. Redistribution Layers (RDL) are formed using PVD seed deposition and subsequent electroplating/patterning to re-route I/O connections on the die to the mold compound regions in the periphery.
Vendors implementing FOWLP today include Amkor, ASE, Freescale, NANIUM, STATS ChipPAC, and TSMC, with TSMC being the most high-profile vendor given its contract win to produce A series processors for Apple’s iPhones.