At this week's VLSI circuits Symposium in Kyoto, imec and Renesas Electronics unveiled the first multi-standard radio frequency (RF) receiver in 28nm CMOS technology, and a 28nm analog-to-digital converter (ADC) targeting wide-bandwidth standards such as LTE-advanced and next-generation WiFi. The 28nm receiver is a linear software-defined radio (SDR) operating from 400MHz up to 6GHz and supporting reconfigurable RF channel bandwidths up to 100MHz. Through new design and architecture techniques, the receiver operates at a low standard supply of 0.9V, while maintaining +5dBm of out-of-band IIP3 and tolerating 0dBm blockers. It achieves noise figures down to 1.8dB, occupies an active area of 0.6mm2, and consumes less than 40mW.

The ADC is a 410MS/s dynamic 11bit pipelined SAR ADC in 28nm CMOS. It achieves a peak Signal-to-Noise Distortion Ratio (SNDR) of 59.8dB at 410MS/s with a power consumption of 2 mW. By combining novel digital calibration techniques with a new ADC architecture, an excellent energy efficiency was achieved. The ADC, including an on-chip calibration engine, occupies an active area of 0.11mm2.

Imec aims at developing solutions that cover all key broadband communication standards including emerging cellular and connectivity standards such as LTE advanced and next-generation WiFi.