Elpida Completes Development of New 50nm Process 2-Gigabit Mobile RAM
Elpida Memory today announced
The new product optimizes the pad layout for PoP (Package on Package), MCP (Multi Chip Package) and other packaging technology and is designed to meet the need for smaller yet higher capacity memory packages for use in mobile devices.
It uses an x32-bit I/O configuration based on double-data rate (DDR) that can operate at an extremely fast speed of 400Mbps (200MHz) to transmit data at the rate of 1.6 gigabytes per second. In addition to JEDEC standard 1.8V the product supports 1.2V supply voltage to further lower power consumption.
Elpida's newest Mobile RAM supports both single-data rate (SDR) and the more advanced DDR and has either an x32 bit or x16 bit I/O configuration on a single-chip.
The company plans to begin mass production of this product in the first half of CY 2009.
The new product optimizes the pad layout for PoP (Package on Package), MCP (Multi Chip Package) and other packaging technology and is designed to meet the need for smaller yet higher capacity memory packages for use in mobile devices.
It uses an x32-bit I/O configuration based on double-data rate (DDR) that can operate at an extremely fast speed of 400Mbps (200MHz) to transmit data at the rate of 1.6 gigabytes per second. In addition to JEDEC standard 1.8V the product supports 1.2V supply voltage to further lower power consumption.
Elpida's newest Mobile RAM supports both single-data rate (SDR) and the more advanced DDR and has either an x32 bit or x16 bit I/O configuration on a single-chip.
The company plans to begin mass production of this product in the first half of CY 2009.
