Samsung Announces 45 nanometer Embedded Flash Logic Process Development
Samsung Electronics has succesfully implemented
the first 45 nanometer (nm) embedded flash ("eFlash") logic process into a smart card test chip, paving the way for deployment of the process on a commercial scale.
"Samsung's 45nm eFlash logic process has the potential to be broadly adopted into various components for security solutions and mobile devices, including smart card IC, NFC IC, eSE (embedded secure element) and TPM (Trusted platform module)," said Taehoon Kim, vice president of marketing, System LSI Business, Samsung Electronics. "The excellent performance from this smart card test chip will help solidify our leadership in the security IC market."
Samsung claims that the smart card IC based on its 45nm eFlash logic process guarantees high reliability and endurance of 1 million cycles per flash memory cell. Other solutions currently on the market are generally rated for 500,000 cycles.
Through the improvement in both flash cell structure and operating scheme, the test chip features random access time to read memory that is 50 percent faster and the power efficiency is enhanced by 25 percent over previous products built on the 80nm eFlash logic process.
Samsung expects to start offering initial smart card IC samples for commercialization in the second half of 2014.
Samsung claims that the smart card IC based on its 45nm eFlash logic process guarantees high reliability and endurance of 1 million cycles per flash memory cell. Other solutions currently on the market are generally rated for 500,000 cycles.
Through the improvement in both flash cell structure and operating scheme, the test chip features random access time to read memory that is 50 percent faster and the power efficiency is enhanced by 25 percent over previous products built on the 80nm eFlash logic process.
Samsung expects to start offering initial smart card IC samples for commercialization in the second half of 2014.