SK hynix has developed the world’s first 4D NAND flash memory using both Charge Trap Flash and Peri Under Cell technologies, with a plan to start mass production this year.
The 96-Layer 512Gb 'CTF based 4D NAND Flash (4D NAND)'is based on the company's TLC (Triple-Level Cell) arrays, using 3D CTF (Charge Trap Flash) design paired with the PUC (Peri. Under Cell) technology. A single 512Gb NAND Flash chip can represent 64GB (Gigabytes) storage.
The South Korean company combined its 3D CTF with PUC for the first time in the industry, which is different from the way of integrating 3D Floating Gate and PUC.
Charge Trap Flash is a technology adopted by most chipmakers to improve performance and productivity by minimizing interruption among cells.
Peri Under Cell is a technology that locates peripheral circuits, normally placed by the side, at the bottom of cells to maximize space efficiency. It is similar to an outdoor parking area being relocated to an underground parking lot.
The result was "finest performance and productivity," according to HK Hynix., which named the new product \CTF-based 4D NAND Flash\ to distinguish it from current 3D NAND Flash technologies.
Charge trap designs are also used by in the flash produced by Samsung and WD/Toshiba. But SK Hynix's 4D NAND touts its CTF design paired with its Periphery Under Cell (PUC) technology.
3D flash consists of the array and the periphery circuitry. SK Hynix's array is a vertical stack of layers that stores data, and the periphery circuitry lines the edges of the die. This circuitry controls the array, but it consumes die space and increases in complexity and size as more NAND layers are added.
SK Hynix's PUC design places the circuitry under the array instead of around it. This increases density, and thus reduces cost. So with 4D NAND, SK Hynix's certainly does not take NAND into the fourth dimension.
SK Hynix claims that the 4D NAND chip reduces more than 30% of chip size and increases bit productivity per wafer by 49% compared to the company’s 72-Layer 512Gb 3D NAND. Moreover, the product has 30% higher write and 25% higher read performance. Also, its data bandwidth is doubled to the industry’s biggest 64KB. With the introduction of a multiple gate insulators architecture, its data I/O (Input Output) speed reaches 1,200Mbps (Megabits/sec) at 1.2V (Volt) of operation power.
In August, SK Hynix announced that it would enhance the solution market competence with various 4D NAND applications at FMS (Flash Memory Summit) 2018 held in Santa Clara, CA.
Above all, with the 96-Layer 512Gb 4D NAND, SK Hynix will introduce 1TB (Terabyte) client SSDs equipped with the company’s own controllers and firmware within this year. Enterprise SSDs will be introduced in the second half of 2019. SK Hynix will also respond to the high density mobile market with the introduction of UFS (Universal Flash Storage) 3.0 in the first half of 2019. Furthermore, the company will roll out ultra-high density 96-Layer 1Tb (Terabit) TLC and QLC (Quad-Level Cell) in 2019.
"This 96-Layer CTF-based 4D NAND, with the industry’s top cost competitiveness and performance, will become a milestone in the company’s NAND Flash business, as a platform in developing future products," said vice president J.T. Kim, the Head of NAND Marketing. "The company plans to start the early stage mass production of it within this year and further expand the production in M15 to actively respond to a variety of clients," he added.
The company's rivals -- Samsung Electronics and Toshiba Memory -- began mass producing 96-layer NAND flash in July and September, respectively.