Samsung Begins Production of DDR2 Memory Using 60nm-Class Technology
Use of the new process technology is a significant milestone in that it increases production efficiency by 40 percent over the 80nm process technology deployed in DRAM fabrication since early 2006, and offers twice the productivity of 90nm general process technology.
Ample market availability of 1Gb DRAM will further increase the demand for large density DRAMs, especially as the new premium Vista operating system imposes a DRAM requirement of at least 1Gigabyte (GB). Samsung's extensive line up of 60nm 1Gb DRAM-based modules includes 512MB, 1GB and 2GB densities supporting either 667Mbps or 800Mbps speeds with customer validation.
Samsung's continuous technology migration below 90nm has relied heavily on the company's extensive use of three-dimensional (3D) transistor technologies to build increasingly smaller chips, a fundamentally unique approach toward finer circuit designs and higher yields. One of the key technologies involved in the development of Samsung's 3D transistor is a recess channel array transistor (RCAT) that actually builds the DRAM cell three-dimensionally to minimize its size while increasing its density.
RCAT technology doubles the refresh cycle, which is critical for enabling efficient fabrication on a nanometer-scale. Samsung has been utilizing RCAT for DRAM fabrication from 90nm. This key 3D technology is expected to enable DRAM fabrication to 50nm and lower.
In addition to its 60nm process technology innovation, Samsung's use of metal-insulator metal (MIM) for its capacitors provides enhanced data storage in sub-70nm designs
Furthermore, the use of a recently-announced selective epitaxial growth (SEG) technology provides for a broader electron channel, and optimizes the speed of each chip's electrons to reduce power consumption and enable higher performance.
Samsung's continuous technology migration below 90nm has relied heavily on the company's extensive use of three-dimensional (3D) transistor technologies to build increasingly smaller chips, a fundamentally unique approach toward finer circuit designs and higher yields. One of the key technologies involved in the development of Samsung's 3D transistor is a recess channel array transistor (RCAT) that actually builds the DRAM cell three-dimensionally to minimize its size while increasing its density.
RCAT technology doubles the refresh cycle, which is critical for enabling efficient fabrication on a nanometer-scale. Samsung has been utilizing RCAT for DRAM fabrication from 90nm. This key 3D technology is expected to enable DRAM fabrication to 50nm and lower.
In addition to its 60nm process technology innovation, Samsung's use of metal-insulator metal (MIM) for its capacitors provides enhanced data storage in sub-70nm designs
Furthermore, the use of a recently-announced selective epitaxial growth (SEG) technology provides for a broader electron channel, and optimizes the speed of each chip's electrons to reduce power consumption and enable higher performance.
