Fujitsu Laboratories has used a new "look-ahead" architecture in the circuit that compensates for quality degradation in incoming signals, parallelizing the processing and increasing the operating frequency for the circuit in order to double its speed. The approach "can be implemented as a parallel process, pre-calculating two candidates based on the selection result for the previous bit, and simultaneously deciding the value of the previous bit and the current bit after deciding the value of the bit two bits previous," Fujitsu Labs said in a statement. The technology is different from other products already on the market operating at 56 Gbps, such as 4X FDR InfiniBand, Fujitsu Labs said, because it achieves 56 Gbps within a single receiver circuit, whereas 4X FDR InfiniBand uses four 14Gbps circuits operating in parallel.
Fujitsu says that technology makes it possible to increase bandwidth of communications between CPUs in future servers and supercomputers, even if CPU performance doubles, without increasing pin counts, and will contribute to increased performance in large-scale systems where numerous CPUs are interconnected. It could also boost speeds outside of server applications, as it could be also applied to consumer devices, according to Fujitsu.
In addition, it complies with standards for optical-module communications, and compared to the 400-Gbps Ethernet in OIF-CEI-28G optical-module communications, the number of circuits running in parallel (number of lanes) can be halved, allowing for smaller optical modules running on less power, and higher system performance.
Fujitsu Laboratories plans to apply this technology to the interfaces of CPUs and optical modules, with the goal of a practical implementation in fiscal 2016. The company is also considering applications to next-generation servers, supercomputers, and other products.
Research presented by Fujitsu Labs on Friday at the 2014 Symposia on VLSI Technology and Circuits in Hawaii detailed the innovation.