Sand Video unveils decoder LSI for H.264
Sand Video has developed the "SV-D011" LSI, which is capable
of decoding H.264-coded HDTV video.
According to the company, this is the industry's first
single-chip LSI capable of decoding H.264 HDTV video.
Samples have already been shipped to its contract customers,
and mass production will begin in the second half of 2004.
SV-D011 is compatible with decoding 1,920 x 1,080 pixel HDTV video with 30 frames or 60 frames per second. Supported profiles are Main Profile and Baseline Profile, and the maximum data coding speed is 30Mbps. It supports up to level 4.1. The maximum data coding speed of level 4.1 is 50Mbps, but it becomes 30Mbps for SV-D011. The company has already confirmed all the functions of the LSI to operate properly. A coder/decoder LSI will also be introduced at the beginning of 2004.
The demonstration at CES this year showed the real-time decoding of H.264-coded 1,920 x 1,080 pixel HDTV video. The demonstrated video had a fixed bit rate, and the data coding speed of 7.9Mbps. The power consumption at the time was said to be around 1.25W. The demonstration also showed decoding of SDTV video with 1Mbps.
In addition to SV-D011, it is also planned to comply with decoding Windows Media Video (WMV) 9 of Microsoft Corp in the third quarter of 2004.
Furthermore, this time the company also demonstrated its H.264 decoder IP core "SV-IP01," which the company is currently developing to be used for mobile apparatuses. This will allow decoding 352 x 288 pixel CIF video with the data coding speed of 300kbps on a FPGA evaluation board. The power consumption of the IP core is estimated to be 50mW.
SV-D011 is compatible with decoding 1,920 x 1,080 pixel HDTV video with 30 frames or 60 frames per second. Supported profiles are Main Profile and Baseline Profile, and the maximum data coding speed is 30Mbps. It supports up to level 4.1. The maximum data coding speed of level 4.1 is 50Mbps, but it becomes 30Mbps for SV-D011. The company has already confirmed all the functions of the LSI to operate properly. A coder/decoder LSI will also be introduced at the beginning of 2004.
The demonstration at CES this year showed the real-time decoding of H.264-coded 1,920 x 1,080 pixel HDTV video. The demonstrated video had a fixed bit rate, and the data coding speed of 7.9Mbps. The power consumption at the time was said to be around 1.25W. The demonstration also showed decoding of SDTV video with 1Mbps.
In addition to SV-D011, it is also planned to comply with decoding Windows Media Video (WMV) 9 of Microsoft Corp in the third quarter of 2004.
Furthermore, this time the company also demonstrated its H.264 decoder IP core "SV-IP01," which the company is currently developing to be used for mobile apparatuses. This will allow decoding 352 x 288 pixel CIF video with the data coding speed of 300kbps on a FPGA evaluation board. The power consumption of the IP core is estimated to be 50mW.