Following Samsung's recent announcement that it would move to 10nm FinFET process next year, TSMC remains confident that it would will beat its South Korean "rival" in the foundry business by ramping up production on its 10nm lines. TSMC plans to start mass production of chips using its 10nm FinFET process by the end of 2016 - about the same time as Samsung - according to president and co-CEO CC Wei. The advanced process will be in risk production later in 2015.

The Taiwanese company will hold its Taiwan Technology Symposium 2015 on May 28, where the foundry is expected to talk about the progress and development of its FinFET manufacturing nodes.

TSMC's main competitor in the chip making process is Intel, which might release its first chips made using 10nm process technology as early as in the middle of 2016.

Until then, TSMC is set to move its 16nm FinFET Plus (16FF+) process to commercial production in the second half of 2015, and plans to introduce a low-power version of the 16FF+ process in early 2016. The 16FF+ process is targeted at high-performance chip solutions, and the lower-power 16FF+ process dubbed 16FFC will be for price-sensitive mobile devices, and wearable and IoT applications.

Total production capacity of the foundry's 16nm FinFET processes at the end of 2016 will triple that a year earlier, said Wei.

According to Digitimes.com, TSMC's 16FF+ process has received more than 20 product tape-outs, 10 of which have achieved satisfying yield performance. By the end of 2015, the number of the tape-outs will top 50 covering different chip products, Wei said.

Challenges ahead

Despite the bold announcements by all the world's largest foundries, the road to further shrinking transistors is long, and still there are challenges to overcome.

Employing EUV lithography technology has proven prohibitively difficult for years, and manufacturers have had to repeatedly push back their commercialization targets. As an alternative, chipmakers came up with ways to create 3-D transistors and multiple-layered chips to enhance overall performance.

Eidec, a Japanese research consortium, claims it has achieved a breakthrough in chipmaking technology that could boost semiconductor performance while significantly reducing production time.

The consortium has developed a highly sensitive resist for extreme ultraviolet lithography equipment at its laboratory in Tsukuba, Ibaraki Prefecture.

In chipmaking, the shorter the light source's wavelength, the more finely a circuit's lines can be etched. Currently, argon fluoride (ArF) lasers, which have a wavelength of 193 nanometers, are used to mass-produce the most advanced chips, those with lines 14-15 nanometers wide. To efficiently manufacture chips with circuit lines finer than 10 nanometers, the practical application of EUV lithography is essential. The stumbling block has been finding a resist suitable for the process. Eidec's researchers claim that their new resist should help boost the productivity of lithography exposure significantly.

In experiments, Eidec was able to use EUV lithography to rapidly create circuit patterns with 17-nanometer-wide lines.

Advances have also been made in light-source output technology for EUV lithography, another aspect affecting productivity. ASML, the largest maker of semiconductor lithography equipment, has succeeded in raising the light-source exposure from 10-20 watts to about 80 watts.

Members of the consortium -- Fujifilm, JSR and Tokyo Ohka Kogyo -- plan to provide the new resist to semiconductor makers globally. These chipmakers are looking to use EUV lithography to mass-produce 10-nanometer-class chips by 2017 and 7-nanometer-class chips by 2019.