Despite the progress in the ultraviolet lithography (EUV) technology, it seems that the global semiconductor industry will face major technical difficulties on fulfilling the requirements of Moore's law. That statement was made by the Morris Chang, Chairman of the Taiwan Semiconductor Manufacturing Co. (TSMC), the world's largest chip foundry.
"Over the next five to 10 years the global semiconductor industry faces major technical hurdles, from the bottleneck in extreme ultraviolet lithography (EUV) technology for sub-7nm processes and growing inapplicability of "Moore's Law" to semiconductor industry," Chang said at the award ceremony in early December in Taichung, central Taiwan.
Moore's Law estimates the number of transistors in a dense integrated circuit to double approximately every two years.
The semiconductor industry has been aggressively pursuing transistor scaling to deliver improvements in performance, size and power consumption, which in turn makes possible new applications and more attractive consumer devices and services, fuelling overall industry growth.
EUV (Extreme Ultra-Violet) lithography is one of the keys to the future of chipmaking, as it is the key technology that will allow tiny transistors to be "printed" on a wafer. The industry is currently using the so-called multi-patterning technique to to the job but ultimately what it really needs is the new tool for EUV lithography.
TSMC aims at a mid-node insertion of EUV at the 10nm logic node in late 2016. But in order to get even lower and continue to increase the transistor density (7nm or lower), even EUV could not be the appropriate approach.